1. Field of the Invention
The present invention relates to a D/A converting apparatus for converting an input digital signal into an analog signal of a voltage (or a current).
2. Description of the Related Art
FIG. 1 is a basic construction diagram of a conventional D/A converting apparatus described in, for example, the "91 Mitsubishi Semiconductor Data Book Digi-Ana Interface/General Purpose Linear IC Edition". In the figure, 1 is a D/A converter, 2 is a constant voltage source for outputting a maximum reference voltage Vr.sup.+, 3 is a constant voltage source for outputting a minimum reference voltage Vr.sup.-, 1a and 1b are input terminals of the D/A converter 1 for inputting the above-mentioned voltages Vr.sup.+ and Vr.sup.-, 1c is a data input terminal group of the D/A converter 1 to which input digital signals (input data D.sub.1) are applied, and V.sub.o is an analog output voltage obtained by the D/A conversion of the input data D.sub.1.
Next, the operation of the D/A converting apparatus shown in FIG. 1 is described.
Assume that n-bit digital data D.sub.1 are input through the data input terminal 1c into the D/A converter 1. Then the D/A converter 1 outputs an output voltage V.sub.o expressed as: EQU V.sub.o =D.sub.1 (Vr.sup.+ -Vr.sup.-)/2.sup.n +Vr.sup.-
where Vr.sup.+ and Vr.sup.- are input voltages respectively applied to the input terminals 1a and 1b.
By the above-mentioned operation, the output voltage V.sub.o determined by the reference voltages Vr.sup.+ and Vr.sup.- can be obtained. Accordingly, by adjusting the voltages of the constant voltage sources 2 and 3, the range of the output voltage V.sub.o can be determined.
FIG. 2 shows the construction of the D/A converter 1. As shown in the figure, the D/A converter 1 includes an n-bit R-2R ladder circuit 7 and a buffering operational amplifier 8. By applying the above-mentioned voltages Vr.sup.+ and Vr.sup.- to the ladder circuit 7, an analog signal is output therefrom. The analog signal is input to a non-inverting input of the operational amplifier 8 so that the output voltage V.sub.o can be obtained from the operational amplifier 8.
FIG. 3 is a basic construction diagram of a conventional D/A converting apparatus. In the figure, the input terminal 1b for the minimum reference voltage of the D/A converter 1 is connected to the ground (0V); and the input terminal 1a is connected to receive the maximum reference voltage output from the constant voltage source 2. In this case, the output voltage V.sub.o is proportional to the maximum reference voltage Vr.sup.+. Namely, the output voltage V.sub.o is expressed as follows. EQU V.sub.o =(Vr.sup.+ /2.sup.n).multidot.D.sub.1
By the above-mentioned operation of the apparatus shown in FIG. 3, the output voltage V.sub.o determined by the maximum reference voltage Vr.sup.+ can be obtained at the output of the D/A converter 1. Accordingly, by adjusting the voltage Vr.sup.+ of the constant voltage source 2, the inclination of the output voltage V.sub.o with respect to the input data D.sub.1 can be determined.
Since the conventional D/A converting apparatuses are constructed as described above, there is a problem in that it is necessary to adjust the analog voltages Vr.sup.+ and Vr.sup.- in the apparatus shown in FIG. 1, or to adjust the analog voltage Vr.sup.+ in the apparatus shown in FIG. 3. In addition, when only a part of the output range between Vr.sup.+ and Vr.sup.- in FIG. 1 or between Vr.sup.+ and 0 in FIG. 3 is necessary, only a certain range of the input data D.sub.1 among the 2.sup.n kinds of data is used so that there is a problem in that the accuracy corresponding to the number of bits cannot be obtained. For example, in FIG. 1, when only the lower half of the range between Vr.sup.+ and Vr.sup.- is necessary in an n-bit D/A converting apparatus, only a value smaller than 2.sup.n-1 among data between 0 and 2.sup.n -1 is input as the input data D.sub.1 so that there is a problem in that only an accuracy corresponding to a D/A converting apparatus of n-1 bits can be obtained.